Triguard
SC300E MPP Processor Module
TECHNICAL
DESCRIPTIO
N
Physical
The
MPP
is
a 9U
high
PCB
with
integral
front
panel.
Some
aspects
of
MPP
operation
are
determined
by
link
settings.
External connections
Each
module
is
plugged
into
the
main
chassis
backplane
bus
system
via
two
DIN41612
connectors
J1
and
J2
(Figure
1
-
1 ).
Figure
2
-
1 shows
the
main
chassis
backplane
bus
interconnections.
Diagnostic port
A 9
-
pin
D
-
type
connector
is
provided
on
the
front
panel.
The
pinout
is
listed
in
Table
2
-
4.
The
diagnostic
port
signals
are
also
available
at
connector
‘g’
at
the
rear
of
the
chassis
backplane
(Tabl
e 2
-
5).
Chassis backplane
The
signals
passing
through
J2
are
available
at
the
rear
of
the
main
chassis
backplane.
The
rear
backplane
connectors
are
shown
in
Figure
2
-
2
. For
additional
information,
refer
to
the
Chassis
User
Manual
(Ref
008
-
5097).
Connector
J1
links
the
MPP
to
the
I/O
modules
and
is
represented
on
the
rear
of
the
chassis
backplane
by
Area
‘d’.
Area
‘d’
consists
of
extensions
to
the
pins
of
the
J1
mating
connector
(96
pins
in
three
columns
a,
b and
c).
Pins
07
to
10
of
columns
‘b’
and
‘c’
are
specially
extended
to
enable
the
installation
of
the
chassis
address
setting
links
(see
Figure
2
-
5
).
Column
‘b’
of
connectors
J2
links
each
MPP
to
the
other
MPPs
via
the
Inter
-
Processor
Communications
Bus.
Columns
‘a’
and
‘c’
of
connectors
J2
link
each
MPP
to
the
expansion
bus
via
rear
backplane
connectors
‘e’.
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