
Trusted
TM
TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 5
4.6.2. Maintenance Enable Keyswitch .................................................................................................27
4.7. Composite Scan Time Estimation (pre TÜV release 3.5)..........................................................27
4.7.1. Central Modules.........................................................................................................................27
4.7.2. Input Modules ............................................................................................................................28
4.7.3. Output Modules..........................................................................................................................28
4
.7.4.
A
pplication Execution.................................................................................................................29
4.7.5. Composite Scan Time ...............................................................................................................29
4.7.6. Example Calculation ..................................................................................................................30
4.8. Composite Scan Time Estimation (from TÜV release 3.5)........................................................31
4.8.1. Input modules ............................................................................................................................31
4.8.2. Output Modules..........................................................................................................................31
4.8.3. Application Execution.................................................................................................................32
4.8.4. Communications........................................................................................................................32
4.8.5. Example Calculation ..................................................................................................................33
5. Fault Finding and Maintenance..................................................................................................34
5.1. Testing and Diagnostics ............................................................................................................34
5.2. Faults .........................................................................................................................................34
5.3. Transfer between Active and Standby Processor Modules .......................................................35
6. Specifications.............................................................................................................................36
Figures
Figure 1 Module Architecture....................................................................................................................8
Figure 2 Functional Block Diagram showing Trusted
TM
TMR Processor Communications ...................22
Figure 3 Block Diagram of Module Operation ........................................................................................23
Figure 4 Module Front Panel ..................................................................................................................25
Tables
Table 1 External I/O Connector Pin-Out.................................................................................................11
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