Rockwell-automation 1770, D17706.5.16 Ref Mnl DF1 Protocol Command Instrukcja Użytkownika Strona 56
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4–2 Using Full-duplex Protocol to Send and Receive Messages
Publication
17706.5.16 - October 1996
With full-duplex protocol, a link uses two physical circuits for
two-way simultaneous message transmission (command or reply
message packets). These two physical circuits provide
communication on four logical paths:
Figure 4.1
Data paths for twoway simultaneous operation
path 1
path 2
path 3
path 4
receiver B
transmitter A
transmitter Breceiver A
circuit 1
circuit 2
•On the first circuit, transmitter A sends messages to receiver B (path 1) and receiver A sends response
control symbols (DLE ACK, DLE NAK) to transmitter B (path 3).
•On the second circuit, transmitter B sends messages to receiver A (path 4) and receiver B sends
response control symbols (DLE ACK, DLE NAK) to transmitter A (path 2).
•All message and symbols on the first circuit are traveling in the same direction (node A to node B) and all
messages and symbols on the second circuit are traveling in the opposite direction (B to A).
Fullduplex Protocol
Message Transmission
- Reference 1
- Important User 2
- Information 2
- What's Changed in This 3
- Document 3
- Table of Contents 4
- Table of Contentsii 5
- Table of Contents iii 6
- Table of Contentsiv 7
- Table of Contents v 8
- Table of Contentsvi 9
- Encoding 10
- Table of Contentsviii 11
- About This Manual 12
- What This Manual 13
- Contains 13
- Terms and Abbreviations 14
- Related Publications 14
- Related Products 15
- Conventions Used in This 16
- Network Basics 17
- Network Layers 18
- Physical Layer 19
- 1–4 Network Layers 21
- 1–6 Network Layers 23
- Software Layers 24
- Message Packet Structure 26
- Protocol 29
- Understanding DF1 Protocol 30
- DF1 Protocol 31
- • request-to-send (RTS) 32
- • clear-to-send (CTS) 32
- • data-carrier-detect (DCD) 32
- • data-set-ready (DSR) 32
- • data-terminal-ready (DTR) 32
- Fullduplex Protocol 33
- Character Transmission 34
- Transmission Symbols 35
- See APP DATA 36
- Send and Receive Messages 38
- Halfduplex Protocol Message 39
- Transmission 39
- Transmitter and Receiver 40
- Message Transfer 40
- Halfduplex Protocol 40
- Environment 40
- 0HVVDJH &KDUDFWHULVWLFV 44
- 0DVWHU 3ROOLQJ 44
- 5HVSRQVLELOLWLHV 44
- )XOO 6LQNV 45
- 6LPSOLILHG 1HWZRUN /D\HU 45
- 6ODYH 7UDQVFHLYHU $FWLRQV 46
- +DOI'XSOH[ 3URWRFRO 48
- 'LDJUDPV 48
- 3ROO ZLWK 0HVVDJH 5HWXUQHG 51
- 0HVVDJH 6LQN )XOO &DVH 53
- 0HVVDJH 6LQN )XOO &DVH 54
- Using Fullduplex Protocol to 55
- Message Transmission 56
- Message Characteristics 58
- Transfer 58
- How the Transmitter Operates 59
- Diagrams 64
- Message Transfer with NAK 65
- In this transfer: 69
- Message Packets 72
- Datalink Layer Message 73
- Message Frames 74
- BCC and CRC Fields 76
- Full-duplex protocol example 77
- CRC Field 78
- Application Layer Message 80
- How Your Application 81
- Program Sends and 81
- Receives Messages 81
- Message Packet Format 82
- DST and SRC 83
- CMD and FNC 84
- STS and EXT STS 85
- Communication Commands 88
- 7–2 Communication Commands 89
- 7–3Communication Commands 90
- 7–4 Communication Commands 91
- 7–5Communication Commands 92
- 7–6 Communication Commands 93
- 7–7Communication Commands 94
- 7–8 Communication Commands 95
- 7–10 Communication Commands 97
- 7–12 Communication Commands 99
- phys. address 100
- 7–14 Communication Commands 101
- SET RESET 102
- to 60 masks of this form 102
- 7–19Communication Commands 106
- 7–20 Communication Commands 107
- 7–21Communication Commands 108
- 7–22 Communication Commands 109
- 7–23Communication Commands 110
- 7–25Communication Commands 112
- 7–27Communication Commands 114
- PLC5 sys. address 115
- Publication 116
- 17706.5.16 - October 1996 116
- Set Reset 117
- 7–31Communication Commands 118
- 7–32 Communication Commands 119
- PLC sys. address 121
- PLC5 Type/Data 123
- Parameter Examples 123
- 7–37Communication Commands 124
- Example: 126
- 7–40 Communication Commands 127
- Message Packet Status Codes 128
- (STS, EXT STS) 128
- STS Byte 129
- EXT STS Byte 130
- Remote STS and 132
- EXT STS Codes 132
- Module Diagnostics 138
- Diagnostic Counters 139
- 9–2 Diagnostic Counters 140
- 1747 Cat. Nos 141
- DH485 Diagnostic Counters 143
- DF1 Diagnostic Counters 144
- 1761 Cat. Nos 145
- 1770 Cat. Nos 146
- Counters 149
- 1771 Cat. Nos 152
- 1775 Cat. Nos 159
- 1779 Cat. Nos 162
- 1784 Cat. Nos 163
- 1785 Cat. Nos 164
- • half-duplex slave 169
- • half-duplex master 169
- 5250 Cat. Nos 171
- Diagnostic Status Information 172
- SLC 5/02 processors only 174
- 1761, 1770, and 1771 176
- Cat. Nos 176
- 1770KF3 Status Bytes 178
- 1773, 1775, and 1779 182
- 1779KP5 Status Bytes 185
- 1785KA5 Status Bytes 188
- 1785KA3 Status Bytes 188
- 1785KE Status Bytes 190
- L60L Status Bytes 193
- 5130 Cat. Nos 194
- Data Encoding 197
- Numbering Systems 198
- Binary Coded Decimal 199
- Hexadecimal 200
- Binary Floatingpoint 201
- Order of Transmission 202
- A 16-Bit Word in PLC Memory 203
- Right-to-Left Bit Order 203
- Uploading and Downloading 204
- Uploading from the 205
- Processor 205
- Downloading to the 209
- PLC Addressing 216
- PLC2/1774PLC 217
- Addressing 217
- PLC2 Physical Addressing 218
- 1774PLC Physical Addressing 218
- PLC3 Addressing 219
- PLC3 Logical Addressing 220
- PLC3 Physical Addressing 222
- PLC3 Symbolic Addressing 223
- • and so on 223
- PLC5 Addressing 224
- PLC5 Logical Addressing 225
- 13–12 PLC Addressing 227
- 13–14 PLC Addressing 229
- PLC5 Physical Addressing 231
- PLC5 Floating Point 232
- • low word then high word 232
- • low byte then high byte 232
- Line Monitor Examples 233
- Halfduplex Line Monitor 234
- Fullduplex PLC2 Line 235
- Monitor Example 235
- Fullduplex PLC3 Line 238
- 14 decimal) 239
- TOTAL TRANS 239
- DLE ETX (2 240
- ASCII Codes 241
- 17706.5.16 July 1996 242
- AllenBradley 249
- Publication Problem Report 249
- BUSINESS REPLY MAIL 250
- Supersedes 251
- Copyright 251
- 1996 AllenBradley Company 251
- , Inc. Printed in USA 251
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