Rockwell-automation SD3000 Drive Configuration, Programming Instrukcja Użytkownika Pobierz pdf (Strona 30)

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PMI

A/B Status Register

The PMI A/B Status register contains bits which describe any errors or warnings reported by the PMI

related to

UDC/PMI

communication on PMI A and PMI B. These bits are latched when set and will

remain set until a fault reset or warning reset is issued.

Bit: 0

Hex Value:

0001 H

Sug. Var. Name:

N/A

Range:

N/A

Access:

Read only

UDC Error Code:

N/A

LED:

N/A

Description: The Invalid Receive Interrupt bit is set when the interrupt generated by the Universal Se-

rial Controller (USC) is not properly marked.

Bit:

Hex Value: 0002H

Sug. Var. Name:

N/A

Range:

N/A

Access:

Read only

UDC Error Code:

N/A

LED:

N/A

Description: The No End of Frame Status Received bit is set if the USC does not report an End of

Frame condition when the receive interrupt is generated.

Bit: 2

Hex Value: 0004H

Sug. Var. Name:

N/A

Range:

N/A

Access:

Read only

UDC Error Code:

N/A

LED:

N/A

Description: The CRC/Framing Error bit is set when the USC reports a CRC or Framing error on the

last frame (message) received.

Bit: 3

Hex Value: 0008H

Sug. Var. Name:

N/A

Range:

N/A

Access:

Read only

UDC Error Code:

N/A

LED:

N/A

Description: The Overrun Error bit is set when the USC reports a receive first-in, first-out overrun.

Bit: 4

Hex Value: 001

Sug. Var. Name:

N/A

Range:

N/A

Access:

Read only

UDC Error Code:

N/A

LED:

N/A

Description: The DMA Format Error bit is set if the length of the received message does not match

the length encoded in the message itself.

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