Rockwell-automation SD3000 Drive Configuration, Programming Instrukcja Użytkownika Pobierz pdf (Strona 77)

To verify that communication between the UDC module and the PMI is resulting in up-to-date

feedback data, it is recommended that the drive’s run permissive logic include the CCLK

synchronized status bit (register

200/1200,

bit 14,

CCLK_OK@)

and the communication lost fault bit

(register

202/1202,

bit 15,

COM_FLT@)

as shown below:

CCLK-OK@

COM-FLT@ RUN-PERM@

Start

Permissive

Logic

RUN-PERM@ :

L-------------J

Refer to the individual bit descriptions in this manual for more information.

4-7

1 2 ... 72 73 74 75 76 77 78 79 80 81 82 ... 117 118

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Rockwell-automation SD3000 Drive Configuration, Programming Instrukcja Użytkownika Strona 77